Broadcom Corporation
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Santa Clara,
CA
With a pure digital CMOS approach and excellent blocking performance, Broadcom's Bluetooth chipsets and system solutions provide the technology to make wireless personal area networking a reality. Providing radio frequency, baseband, system and complete software support to OEMs and system integrators, Broadcom's Bluetooth chips enable the wireless sharing of data among scores of electronic devices, from mobile phones and wireless stereo headsets to PDAs and automobiles.
As a senior engineering team member, you will contribute to the design, development and verification of Broadcom's highly successful Wireless SOCs.
Responsibilities include:
• Lead the block level architecture design
• Author detailed design documents
• Assist in the development of embedded FW
• Develop and execute thorough simulation and lab verification plan
• Participate in the emulation platform development and lab debugging
Job Requirements : • B.S. degree in EE or Computer Engineering and minimum of 9 years related experience. or M.S. and a minimum 6 years experience or Ph.D. and 3 years experience is preferable.
• Excellent knowledge of wireless communication systems and high speed low power digital circuit design.
• Design experience with 802.11 a/g/n MAC and Bluetooth is a plus.
• Excellent knowledge in languages relevant to the ASIC development process including Verilog, VHDL and C /C++/SystemC .
• Strong analytical, and problem solving skills as well as hands-on lab debugging skills.
• Excellent knowledge of RTL simulation and synthesis.
• In-depth knowledge for design for low power and design for test and design for manufacturing.
• Self-motivated, excellent communication skills and ability to excel in a team environment.
Will consider both Santa Clara and San Diego locations.
WCG8144
City : Santa Clara
State : California
Country : United States
Santa Clara, California
Santa Clara, CA
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